Sony's New 3-layer stacked CMOS
Last month, Sony revealed that they are developing the industry’s first 3-layer stacked CMOS designed for smartphones.
Sony’s new CMOS sensor will have an added DRAM layer, compared to the traditional 2-layered sensor. The DRAM layer is set to increase data readout speeds and to have a capacity of 1 Gbit. It is also said to have a resolution of 5520 x 3840 pixels, a sensor side of 1/2.3 (7.73mm diagonal), a unit cell size of 1.22?m x 1.22?m, and a reading speed of 8.478 ms.
The DRAM layer has been designed to temporarily store the image signals, which allows data to be processed quickly. The new CMOS’ ability to read image signals at the speeds it does lets the CMOS to perform two key features:

Lower Focal Plane Distortion

The DRAM layer uses a 1/120 second readout to minimize the focal plane distortion, which is what usually happens when you take a picture of a moving subject on your smartphone. It’s able to lower the focal plane distortion, because it takes about 4x less time to read the whole line of pixels it is capturing.

Shoot Super Slow Motion Clips

Sony’s CMOS sensor is able to capture slow motion clips at up to 1,000 frames per second in full HD. The way it works is the DRAM exports the normal speed shooting data and the 1,000 frames per second high speed shooting from the image sensor to an external image signal processor for signal processing. This makes it possible to capture and make videos that combine both normal speed footage and super slowed footage. The CMOS also offers a feature that enables for automatic high speed recording that starts recording once it detects movement.
Sony hasn’t set a release date for their CMOS sensors yet. "There's no word on when we'll start to see smartphones that feature Sony's new image sensor, but Sony's camera technology is pretty popular with phone makers, so it's probably just a matter of time," says Brad Linder, editor of Liliputing. 

Sean Berry is a blogger and Videomaker Associate Editor.